Image sensor with a plurality of pixels, pixel circuit and method

ABSTRACT

An image sensor has a plurality of pixels, each pixel having a photodiode ( 12 ), a voltage amplifier ( 16 ) having gain magnitude greater than 1 and a sampling capacitor ( 18 ) charged by the voltage amplifier. In this arrangement, each pixel provides gain through voltage amplification. This enables the sampling capacitor to be kept to a low size, so that the pixel circuitry occupies the smallest possible space, thereby enabling large aperture pixels to be formed. A source-follower buffer transistor ( 49 ) is provided at the input to the voltage amplifier. This overcomes the effect of charge sharing resulting from the parasitic capacitances of the output transistor of the voltage amplifier.

This invention relates to image sensors, in particular having arrays ofimage sensing pixels, for example for use as solid state X-ray imagingdevices.

There is significant interest in developing solid state X-ray imagingdevices, to replace the image intensifiers currently used in hospitals.

Various pixel configurations have been proposed in which each pixelcomprises a light sensitive element, such as a photodiode, and at leastone switching device. For example, one known pixel design comprises asingle thin film transistor (TFT) and a photodiode. During an exposureperiod, the TFT is turned off so that the photodiode is isolated.Incident light causes a minority carrier current to be produced, whichcauses the parasitic self-capacitance of the diode to be discharged.During the next readout, the capacitance of the diode is reset and thechange in charge is detected by the amplifier.

It has also been proposed to provide in-pixel gain in order to improvethe signal to noise ratio of the Image sensor pixel. This isparticularly desirable in Flat Dynamic X-Ray Detection (FDXD). Thein-pixel amplification is performed before additional electronic noiseis introduced.

One way to achieve in-pixel gain is to include an additionalstorage/sampling capacitor within the pixel configuration, with thecharge stored on the sampling capacitor being greater than the chargegenerated by the photodiode. The sampling capacitor charge can then bemeasured by the readout amplifier.

WO 01/57554 discloses a pixel configuration in which the voltage acrossthe pixel photodiode (which is representative of the illumination level)is provided to a source follower circuit arrangement which acts as aunitary gain voltage buffer. The output voltage charges a samplingcapacitor, and the gain of the pixel is dependent on the ratio of thecapacitance of the sampling capacitor to the pixel capacitance. Thecircuit operates according to the principle of so-called “DoubleCorrelated Sampling” (DCS). The double sampling approach eliminatesnoise induced by the resetting of the sampling capacitor and isparticularly desirable for low noise amplification. DCS involvessampling the voltage across a sampling capacitor corresponding to areset condition of the sensor element, so that the subsequent flow ofcharge to the sampling capacitor is representative of the change involtage across the sensor element and not dependent on the reset stateof the sensor element.

Whilst this circuit operates well, one problem with this approach is thearea required for the sampling capacitor, which can limit the possibleresolution which can be achieved. There is, however, a need to providepixel gain with low noise.

It has been proposed by the applicant to provide voltage amplificationwithin the pixel circuits. This enables a smaller sampling capacitor tobe used.

However, a problem associated with the use of a voltage amplifiercircuits arises as a result of the Miller effect. In particular, theinput impedance of the voltage amplifier causes some of the input chargeto be shared between an input storage capacitance and the parasiticgate-source capacitance of the drive transistor. The Miller effect tendsto increase the apparent parasitic capacitance at this stage.

According to the invention, there is provided an image sensor comprisinga plurality of pixels, each pixel comprising:

a light sensor element, a sensor voltage across the element varyingdepending on the light incident on the element;

a voltage amplifier having gain magnitude greater than 1; and

a sampling capacitor charged by the voltage amplifier,

wherein the voltage amplifier comprises first and second transistors inseries, the input to the voltage amplifier being provided to the gate ofthe first transistor, and the output being defined by the junctionbetween the first and second transistors,

and wherein each pixel further comprises a third transistor, the gate ofthe third transistor being connected to one terminal of the light sensorelement, and the source of the third transistor being connected to thegate of the first transistor.

In this arrangement, each pixel provides gain through voltageamplification. This enables the sampling capacitor to be kept to a lowsize, so that the pixel circuitry occupies the smallest possible space,thereby enabling large aperture pixels to be formed. The amplifierarrangement of two series-connected transistors uses the requirement forequal source-drain currents to provide voltage amplification of thegate-source voltage signals. The third transistor acts as a bufferbefore signal amplification, and this overcomes the effect of chargesharing resulting from the parasitic capacitances of the firsttransistor of the voltage amplifier.

Although the self-capacitance of the light sensor element may besufficient to store the photodiode voltage temporarily, each pixelpreferably further comprises a pixel storage capacitor connected to thelight sensor element. The capacitance of the sampling capacitor is thenless than 10 times the capacitance of the pixel storage capacitor,preferably less than 2 times the capacitance of the pixel storagecapacitor, and may be equal to the capacitance of the pixel storagecapacitor.

Thus, the size of the sampling capacitor can be kept to a minimum.

The capacitance of the sampling capacitor may be in the range 0.5 pF to3 pF, and the self-capacitance of light sensor or the capacitance of thepixel storage capacitor may also be in the range 0.5 pF to 3 pF. Thegain magnitude of the voltage amplifier may be in the range 2 to 5.

The output of the voltage amplifier is preferably connected to oneterminal of the sampling capacitor, the other terminal of the samplingcapacitor being connected to the pixel output through an output switch.This output switch can be used both for connecting a charge sensitiveamplifier to the output and for a resetting operation. Each pixelpreferably further comprises an input switch for applying a fixedpotential across the light sensor element, thereby providing a resetfunction.

The invention also provides a method of measuring light intensity of animage to be detected using a plurality of light sensor elements eachforming a pixel of an image sensor, a sensor voltage across the elementsvarying depending on the light incident on the elements, the methodcomprising:

providing the sensor voltage to an in-pixel voltage amplifier through asource-follower buffer transistor;

amplifying the voltage provided by the source-follower buffer transistorusing the in-pixel voltage amplifier having a gain magnitude greaterthan 1;

charging a sampling capacitor with the amplified voltage and measuringthe flow of charge required to charge the sampling capacitor.

Preferably, a reset operation is carried out before amplifying thesensor voltage, the reset operation comprising applying a knownpotential to one terminal of the sampling capacitor and applying a knownpotential across the sensor element, the amplified voltage beingsubsequently applied to the other terminal of the sampling capacitor.

This reset operation samples the output of the voltage amplifiercorresponding to a reset pixel, double correlated sampling can beimplemented.

Examples of the present invention will now be described by way ofexample, with reference to and as shown in the accompanying drawings inwhich:

FIG. 1 shows schematically a pixel configuration for use in an imagesensor proposed by the applicant;

FIG. 2 shows in more detail an implementation of the pixel circuit ofFIG. 1;

FIG. 3 shows a first pixel circuit of the invention;

FIG. 4 shows timing diagrams to explain the operation of the circuit ofFIG. 3;

FIG. 5 shows a second pixel circuit of the invention;

FIG. 6 shows a third pixel circuit of the invention; and

FIG. 7 shows an image sensor of the invention.

FIG. 1 shows in schematic form a pixel configuration proposed by theapplicant, for use in a solid-state image sensor.

The pixel 10 comprises a light sensor element 12, in the form of aphotodiode.

The photodiode signal is in the form of a current which is dependent onthe light input and which flows for a defined time—the sample time. Thesignal to be sensed is thus a flow charge, which is a minority carriercurrent which discharges the self-capacitance of the photodiode duringillumination. This flow of charge is converted to a voltage by a pixelcapacitor 14.

A voltage across the photodiode thus varies depending upon the lightincident on the photodiode. In the examples below, the pixel capacitor14 is a separate component to the photodiode, but the photodiodeself-capacitance can perform the same function.

In FIG. 1, the pixel capacitor 14 is connected between the photodiodeoutput (the cathode) and ground. Instead, the pixel capacitor may be inparallel with the photodiode. The photodiode of each pixel is connectedat its anode to a voltage supply line 15.

The voltage Vin provided by the photodiode is amplified by an in-pixelamplifier 16 with gain G, so that a sampling capacitor 18 at the outputof the amplifier is charged to a greater voltage than the photodiodevoltage. As a result, a greater flow of charge is required, and thischarge flow is measured as the output of the pixel.

If the sampling capacitor 18 has the same capacitance as the pixelcapacitor 14, the gain of the pixel is G, and there is no charge gain.However, the sampling capacitor 18 may be larger than the pixelcapacitor 14 so that the circuit can implement voltage amplification aswell as charge gain.

This circuit enables the size of the sampling capacitor to be reduced,so that the pixel circuit components can occupy a smaller space, therebyimproving the optical aperture of the pixel.

A reset input switch 20 is provided at the input to the pixel, and thisenables a rest voltage Vreset to be applied to the photodiode and pixelcapacitor to reset the photodiode between read out cycles. An outputswitch 22 enables the output to be connected to a charge sensitiveamplifier and also enables a reset sampling operation to be performed asdescribed further below.

Before an exposure period, a reset operation is carried out by closingthe reset input switch 20. This causes the photodiode to be charged to aknown voltage. The voltage appearing at the output of the amplifier 16is then sampled by closing the output switch 22 to charge the outputplate of the sampling capacitor to a fixed potential, typically 0V. Theoutput voltage corresponding to the amplified signal for a pixel in thereset condition is thus held across the sampling capacitor. The outputswitch 22 is then opened, as well as the input switch 20, and the pixelis illuminated.

The pixel capacitor 14 holds the resulting photodiode/pixel capacitorvoltage, and this is amplified by the amplifier 16. As there is nocharge path to the output plate of the sampling capacitor 22, thevoltage on this plate rises with the output voltage of the amplifier.After illumination is complete, the output switch 22 is closed and thecharge flow is measured to return the output plate of the samplingcapacitor to 0V (i.e. to the same voltage applied to the samplingcapacitor during the initial reset operation). Thus, the charge measuredis independent of the voltage resulting from the reset operation, and inthis way double correlated sampling is implemented.

FIG. 2 shows in more detail a first NMOS implementation of the pixelcircuit of FIG. 1, and which may be implemented using amorphous silicontransistors. The same reference numerals are used as in FIG. 1 for thesame components.

The input switch 20 is implemented as an input TFT (thin filmtransistor) 30 with its gate connected to a reset input control line 32.The output switch 22 is implemented as an output TFT 34 with its gateconnected to an output control line 36. The amplifier 16 is implementedas first and second NMOS transistors 38, 40 which are connected inseries between the voltage supply line 15 and ground.

When the amplifier is operating, the sampling capacitor is isolated bythe output switch 22, so that the current flowing through the twotransistors is constrained to be the same. The current through thetransistor 40 is a function of the input voltage, which is thegate-source voltage. Similarly, the current through the transistor 38 isa function of the output voltage Vout, as the voltage between the outputVout and a fixed voltage bias 44 defines the gate-source voltage of thetransistor 38. Thus, the amplifier stabilises when the output voltage issuch as to match the source-drain current of the two transistors.

By appropriate design of the two transistors 38, 40, the amplifierprovides voltage gain, by requiring a greater change in gate-sourcevoltage for the transistor 38 than the change in gate-source voltagerequired for the transistor 40 in order to achieve the same change insource-drain current. The drain of each transistor 38 is connected tothe fixed voltage supply line 15.

The transistor 38 can have its gate 44 connected to the power line 15,so that the gate and drain are connected together. This diode connectionof the transistor 38 provides a diode-loaded amplifier arrangement.

The amplifier is inverting, and the gain provided may be in the range1.5 to 10, preferably 2 to 5. The gain of the amplifier section isbasically the square root of the ratio of the transconductances (g_(m))of the two TFTs. The transconductance is proportional to the width tolength ratio of the TFT channel, and can therefore be controlled byselection of the size and shape of the transistor channels. For example,for an amplifier with the upper TFT width 5 μm and lower TFT width 100μm (both with length 5 μm), the ratio of widths is 20. This is directly(in first approximation) related to the transconductance g_(m), and sothe gain is about 4.5. In reality, the TFTs are not actually working inthe ideal saturation region, and so gain is slightly different.

For operation in (or close to) the saturation region, the TFTs have tobe appropriately biased. The higher the gate voltage, the greater the DCbias current through the amplifier. This speeds up the action of thepixel. However, it also tends to reduce the working range of theamplifier and so reduces dynamic range.

The specific implementation of the amplifier as well the bias conditionsfor appropriate operation will be routine to those skilled in the art.

The light sensor element is connected to the gate of one of thetransistors 40, and a bias voltage 44 is connected to the gate of theother transistor 38, the output of the voltage amplifier being definedat the connection between the first and second transistors.

A problem with this circuit is that some of the input charge is sharedbetween the input storage capacitance 14 and the parasitic gate-sourcecapacitance of the amplifier transistor 40. Miller effects tend toincrease the apparent parasitic capacitance at this stage, particularlyas the amplifier is inverting.

FIG. 3 shows a pixel circuit of the invention. The invention providesbuffering of the signal voltage into the amplifier TFT 40. An additionalsource-follower transistor buffers the input into the amplifiertransistor.

The pixel circuit of FIG. 3 uses the same reference numerals as thecircuit of FIG. 2. The additional source-follower transistor is shown as49. This acts as a source follower into the gate of the amplifiertransistor 40. The gate of the amplifier transistor 40 thus tends to onethreshold voltage below the gate voltage of the source-followertransistor 49.

The source follower transistor 49 has its source connected to the gateof the amplifier transistor 40, and the input voltage is provided to thegate of the source follower transistor 49. The drain of the sourcefollower transistor is connected to the power supply line 15. Thisdefines a non-inverting unitary gain buffer stage.

The additional source follower transistor 49 drives only the gatecapacitance of the amplifier TFT 40 and is not disturbed in readout, soit can be made with small dimensions. This greatly reduces the size ofthe parasitic capacitance effective on the input storage capacitance 14.As the additional source follower transistor 49 is non-inverting and hasno gain, the Miller effect is negligible. The larger Miller capacitanceof the amplifier TFT 40 no longer effects the operation of the circuitas the buffer voltage-drives the amplifier input, so that the bufferreplaces the lost charges.

FIG. 4 shows timing diagrams to explain the operation of the circuit ofFIG. 3.

Plot 50 shows the exposure period during which the voltage on the pixelcapacitor varies in dependence on the input voltage. During the exposureperiod, the input and output switches are open.

Plot 52 shows the operation of the output switch 22 and represents thesignal applied to the output control line 36. Plot 54 shows theoperation of the reset input switch 20 and represents the signal appliedto the reset input control line 32. Plot 56 shows the operation of thecharge measurement circuit connected to the output.

All pixels are illuminated simultaneously, and are subsequently read outin rows. Thus, each of the plots 52, 54, 56 may be applied in turn tothe different rows of the array of pixels.

When signals stored in a row of pixels are to be read, the output switchfor each column of pixels is first closed, and the respective chargesensitive amplifier then charges or discharges the sampling capacitor 18until the voltage on the output plate is equal to the voltage of thecharge sensitive amplifier. This is shown as plot 56. The chargesensitive amplifier has a virtual earth input, so that it holds thecapacitor output plate to 0V, whilst the amplifier maintains theamplified output voltage because the voltage input to the amplifier isheld by the pixel capacitor 14. The flow of charge is measured, andrepresents the change in voltage across the photodiode.

Each column may be associated with a charge sensitive amplifier, so thatall columns of pixels are read simultaneously, row by row. However,multiplexing arrangements may be used to reduce the number of chargesensitive amplifiers required.

At the end of the charge measurement operation, the photodiode is reset,by the pulse of plot 54. This places a fixed voltage across thephotodiode. As the output switch 22 remains closed, a charge can bestored across the sampling capacitor, so that the reset noise iseffectively sampled, and in this way double correlated sampling isimplemented.

The reset pulse then ends, and shortly afterwards the output switchopens in preparation for the next illumination period.

A reset switch may be connected in parallel with the sampling capacitor18 operated synchronously with the input switch 20, for assisting thedischarge of the sampling capacitor after the charge measurement cycle.In this case, the output switch is preferably opened at this time, asshown in dotted lines in plot 52.

FIG. 5 shows a second implementation of the pixel circuit of FIG. 3,which is a CMOS (polycrystalline silicon) implementation. The onlydifference between FIG. 5 and FIG. 3 is that the transistor 38 isimplemented as a PMOS transistor, with the source and gate connectedtogether.

FIG. 6 shows a modification to the pixel circuit of FIG. 3, in which acurrent source 58 provides biasing of the source follower transistor 49.This can be used if the pixel circuit is to be operated at high speed.

FIG. 7 shows a known X-ray examination apparatus which includes an X-raysource 60 for irradiating an object 62 to be examined, for example apatient to be radiologically examined, by means of an X-ray beam 64. Dueto local differences in the X-ray absorption within the patent, an X-rayimage is formed on an X-ray-sensitive surface 66 of the X-ray detector68.

It is known to use as the X-ray detector 68 a solid state optical imagesensor. The incident X-ray radiation is converted into light using aphosphor scintillator 66. This light can be detected by the solid-statedevice 68. Alternatively, an X-ray sensitive photoconductor can be usedto convert the X-rays directly into electrons.

The pixel design of the invention is suitable for use in the solid stateoptical image sensor.

Various modifications will be apparent to those skilled in the art.

1. An image sensor comprising a plurality of pixels, each pixelcomprising: a light sensor element (12), a sensor voltage across theelement varying depending on the light incident on the element (12); avoltage amplifier (16) having gain magnitude greater than 1; and asampling capacitor (18) charged by the voltage amplifier, wherein thevoltage amplifier comprises first (40) and second (38) transistors inseries, the input to the voltage amplifier being provided to the gate ofthe first transistor (40), and the output being defined by the junctionbetween the first and second transistors (40,38), and wherein each pixelfurther comprises a third transistor (49), the gate of the thirdtransistor being connected to one terminal of the light sensor element(12), and the source of the third transistor (49) being connected to thegate of the first transistor (40).
 2. An image sensor as claimed inclaim 1, wherein each pixel further comprises a pixel storage capacitor(14) connected to the light sensor element (12).
 3. An image sensor asclaimed in claim 2, wherein the capacitance of the sampling capacitor(18) is less than 10 times the capacitance of the pixel storagecapacitor (14).
 4. An image sensor as claimed in claim 3, wherein thecapacitance of the sampling capacitor (18) is less than 2 times thecapacitance of the pixel storage capacitor (14).
 5. An image sensor asclaimed in claim 4, wherein the capacitance of the sampling capacitor(18) is approximately equal to the capacitance of the pixel storagecapacitor (14).
 6. An image sensor as claimed in claim 3, wherein thecapacitance of the sampling capacitor (18) is in the range 0.5pF to 3pF,and the capacitance of the pixel storage capacitor (14) is in the range0.5pF to 3pF.
 7. An image sensor as claimed in claim 1, wherein thecapacitance of the sampling capacitor (18) is less than 10 times aself-capacitance of the light sensor element (12).
 8. An image sensor asclaimed in claim 7, wherein the capacitance of the sampling capacitor(18) is less than 2 times the self-capacitance of the light sensorelement (12).
 9. An image sensor as claimed in claim 7, wherein thecapacitance of the sampling capacitor (18) is in the range 0.5pF to 3pF,and the self-capacitance of light sensor (12) is in the range 0.5pF to3pF.
 10. An image sensor as claimed in claim 1, wherein the gainmagnitude of the voltage amplifier (16) is in the range 2 to
 5. 11. Animage sensor as claimed in claim 1, wherein a bias voltage (44) isconnected to the gate of the second transistor (38).
 12. An image sensoras claimed in claim 11, wherein the output of the voltage amplifier (16)is connected to one terminal of the sampling capacitor (18), the otherterminal of the sampling capacitor (18) being connected to the pixeloutput through an output switch (22;34).
 13. An image sensor as claimedin claim 1 wherein each pixel further comprises an input switch (20;30)for applying a fixed potential (Vreset) across the light sensor element.14. A method of measuring light intensity of an image to be detectedusing a plurality of light sensor elements (12) each forming a pixel ofan image sensor, a sensor voltage (Vin) across the elements varyingdepending on the light incident on the elements, the method comprising:providing the sensor voltage (Vin) to an in-pixel voltage amplifierthrough a source-follower buffer transistor; amplifying the voltageprovided by the source-follower buffer transistor using the in-pixelvoltage amplifier (16) having a gain magnitude greater than 1; charginga sampling capacitor (18) with the amplified voltage (Vout) andmeasuring the flow of charge required to charge the sampling capacitor(18).
 15. A method as claimed in claim 14, wherein a reset operation iscarried out before amplifying the voltage provided by thesource-follower buffer transistor, the reset operation comprisingapplying a known potential to one terminal of the sampling capacitor(18) and applying a known potential (Vreset) across the sensor element,the amplified voltage (Vout) being subsequently applied to the otherterminal of the sampling capacitor (18).
 16. A method as claimed inclaim 14, wherein the capacitance of the sampling capacitor (18) is lessthan 10 times the capacitance of a pixel storage capacitor (14) of thepixel.
 17. A method as claimed in claim 16, wherein the capacitance ofthe sampling capacitor (18) is less than 2 times the capacitance of thepixel storage capacitor (14).
 18. A method as claimed in claim 17,wherein the capacitance of the sampling capacitor (18) is approximatelyequal to the capacitance of the pixel storage capacitor (14).
 19. Amethod as claimed in claim 14, wherein the gain magnitude of the voltageamplifier (16) is in the range 2 to 5.